The present invention relates to processing methods in semiconductor device fabrication, and more particularly, to a method of etching a metal silicide layer without etching excessive amounts of other component layers in a gate stack or other layered structure.
The operating speed of semiconductor devices depends primarily on the resistivity of the conductive material used to transmit signals from one circuit component to another. In semiconductor fabrication, tungsten silicide (WSix) has developed as a leading low-resistivity conductive layer for improved conductivity in wordlines and other conductors in memory devices. Other metal suicides used in gate stacks include cobalt silicide (CoSix), molybdenum silicide (MoSix), and titanium silicide (TiSix).
FIG. 1 illustrates a wafer fragment 10 with an exemplary conventional gate stack structure 12, after etching, disposed on a silicon substrate 14. As shown, the layered gate stack 12 includes a gate dielectric layer 16 such as silicon dioxide (SiO2) formed on the silicon substrate 14, a doped polysilicon layer 18, a metal silicide layer 20, a tungsten nitride barrier layer 22, a tungsten layer 24, a low silane oxide (LSO) layer 26, a nitride cap layer 28, and an anti-reflective coating (ARC) layer 30. After the gate etch, a short oxidation step is then performed to oxidize the silicon surface 14 to heal damage caused by the etch. The oxidation also eliminates sharp corners of the etched polysilicon gate layer 18 to eliminate potential leakage, commonly referred to as xe2x80x9csmiling the gate.xe2x80x9d Thereafter, a dopant implantation is performed to form the source/drain (S/D) regions 34a-b in the silicon substrate 14.
A drawback of metal suicides is that they are prone to oxidization. Consequently during the oxidation step, the metal silicide is also oxidized. This can cause undesirable lateral growth of the metal silicide, resulting in formation that is commonly termed xe2x80x9cmouse earsxe2x80x9d 36 on the sidewalls 32b of the metal silicide layer 20, as shown in FIG. 2. Such lateral growth can interfere with a subsequent ion implantation step to form the source/drain (S/D) regions 34a-b, thus creating processing problems.
Therefore, it would be advantageous to develop a technique that minimizes or eliminates the effect of lateral growth (i.e., mouse ears) of a metal silicide layer during semiconductor fabrication.
The invention provides an etch solution and methods for selectively etching the metal silicide layer of a gate stack or other layered structure in the fabrication of a semiconductor device, without substantially etching the other component layers of the structure.
The etch solution according to the invention comprises one or more fluorine-comprising compounds and one or more oxidizing agents, with a pH control agent to maintain the solution at a pH of about 7 to about 10. The etch solution includes the fluorine compound and oxidizer in amounts effective to selectively etch metal silicide at a rate exceeding that of polysilicon and oxides, preferably at an etch rate about 2 to about 10 times higher. A preferred etch solution to etch a tungsten silicide layer comprises an effective amount of ammonium fluoride (NH4F) and less than about 2% by volume hydrogen peroxide (H2O2), with an amount of ammonium hydroxide (NH4OH) to increase the pH to about 7 to about 10, preferably about pH 8 to about 9, whereby oxides and polysilicon components are not substantially etched.
The methods of the invention can be used to selectively remove a thickness of a blanket layer of metal silicide, or a portion of a layer of metal silicide interposed between layers in a multilayered structure to form an inset or recessed structure in the layer.
In one embodiment, the method is used in forming a gate stack comprising a layer of metal silicide. The metal silicide gate layer is selectively etched to form an inset into the layer, whereby other component layers are not substantially etched. In a subsequent oxidation step, the metal silicide will undergo oxidation whereby the inset is filled with oxide, resulting in a sidewall that is flush with the sidewalls of the other layers of the gate structure. Thus, the method is useful for minimizing or eliminating the formation of xe2x80x9cmouse earsxe2x80x9d on the exposed surface of a metal silicide gate layer during oxidation of the source/drain regions.
In another embodiment, the method is used for reducing the thickness of a blanket layer of metal silicide. Using the etch chemistry of the invention, the metal silicide is selectively etched to remove a portion of the layer and decrease its thickness. The method is useful, for example, in a process that utilizes an oxidation step on a substrate that includes a metal silicide layer; the metal silicide layer will undergo oxidation resulting in an increase in the thickness of the layer.